Paolo Ienne

Paolo Ienne has been a Professor at the EPFL since 2000 and heads the Processor Architecture Laboratory (LAP). Prior to that, from 1990 to 1991, he was an undergraduate researcher with Brunel University, Uxbridge, U.K. From 1992 to 1996, he was a Research Assistant at the Microcomputing Laboratory (LAMI) and at the MANTRA Center for Neuro-Mimetic Systems of the EPFL. In December 1996, he joined the Semiconductors Group of Siemens AG, Munich, Germany (which later became Infineon Technologies AG). After working on datapath generation tools, he became Head of the embedded memory unit in the Design Libraries division.

His research interests include various aspects of computer and processor architecture, reconfigurable computing, on-chip networks and multiprocessor systems-on-chip, and computer arithmetic.

Dr. Ienne was a Recipient of Best Paper Award at the 40th Design Automation Conference in 2003 and at the International Conference on Compilers, Architectures, and Synthesis for Embedded Systems in 2007. In 2008, he has been General Co-Chair of the 6th IEEE Symposium on Application Specific Processors and Guest Editor of a Special Section on Application Specific Processors which appeared in October 2008 on the IEEE Transactions on Very Large Scale Integration Systems. He is or has been a member of the program committees of several international workshops and conferences, including Design Automation and Test in Europe (DATE), the International Conference on Computer Aided Design (ICCAD), the International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES), the International Symposium on High-Performance Computer Architecture (HPCA), the ACM International Conference on Supercomputing (ICS), the International Conference on Field Programmable Logic and Applications (FPL), and the IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC).