McSimA+
McSimA+ is a many-core CPU simulator with application level simulation and detailed micro architecture modeling. It is an open source architecture simulator which is designed to simulate many-core asymmetric systems and it's developed by HP Labs and Seoul National University. Formerly it was called McSim, however it is not related with MCSim, which is a statistical simulator for Monte Carlo analysis.
McSimA+ simulates x86 based asymmetric many-core micro architectures in detail for both core and uncore subsystems, that is non-computational elements such as cache hierarchies, coherence hardware, on-chip interconnects, memory controllers and main memory.
Key Features
The simulator models the micro architecture details of many-core systems and the need for high performances has been pursued providing only vital, lightweight OS features.
Decoupled
McSimA+ is a decoupled functional and timing simulator. Decoupled means that for a particular hardware configuration and benchmark, timing analysis and functional correctness analysis are done independently to achieve higher performance on simulation time. This feature of McSimA+ is similar with GEMS, MARSSx86, SimFlex, GPGPUsim, PTLSim and CMP$im.
Full System Support - Application Level
The simulator simulates both architecture and operating system. To reach good performances in a many-core architecture, The Developers have included in the OS only vital low-level features, like thread and process management. As a consequence, McSimA+ doesn't provide all the features of a full-system simulator but the impact of each architectural change can be observed without compromising performances.
Many-core Architecture Support and Detailed Support on Micro Architecture
McSimA+ does not focus on one specific subsystem such as NoC, cache or DRAM, but provides support for all subsystems, both core and uncore. It can support systems of one thousand of more cores.
Instruction Set Architecture Support
McSimA+ supports the x86 instruction set.