Dr. R. Pavithra Guru
Dr. R. Pavithra Guru is an Indian academic researcher and Assistant Professor in the Department of Computing Technologies at SRM Institute of Science and Technology, Kattankulathur. He specialises in VLSI physical design, electronic design automation (EDA), and metaheuristic optimization algorithms.
Biography
Dr. R. Pavithra Guru received his B.E. in Electronics and Communication Engineering from Anna University (2014), M.E. in VLSI Design from Anna University (2016), and Ph.D. in Information and Communication Engineering from Anna University (2022). His doctoral thesis was titled Investigations on Circuit-Level Evolutionary Partitioning Algorithms for VLSI Physical Design Automation. From 2023 to 2024, he completed a Post-Doctoral Research Fellowship at City, University of London, UK, focusing on privacy-preserving machine learning and homomorphic encryption.
Academic Career
- SRM Institute of Science and Technology, Kattankulathur – Assistant Professor, Department of Computing Technologies (December 2024 – Present)
- Rajalakshmi Engineering College – Assistant Professor (Senior Grade), Department of AI and Machine Learning (June–December 2024)
- SRM Institute of Science and Technology, Ramapuram – Assistant Professor, Department of CSE (March 2022 – June 2024)
- SSN College of Engineering – Lecturer/Assistant Professor, Department of ECE (July 2016 – March 2022)
Research
His research addresses NP-hard circuit partitioning and floorplanning in VLSI physical design using metaheuristic algorithms — Ant Colony Optimization, Grey Wolf Optimization, and Satin Bowerbird Optimization — to reduce interconnections and improve chip performance. Current work includes GPU-independent optimization and machine learning integration in EDA tools.
Selected Publications
- Guru, P. (2020). "An efficient VLSI circuit partitioning algorithm based on satin bowerbird optimization (SBO)." Journal of Computational Electronics. doi:10.1007/s10825-020-01484-0
- Guru, P. (2025). "Grey wolf optimization (GWO) based efficient partitioning algorithm for VLSI circuits for reducing the interconnections." Analog Integrated Circuits and Signal Processing. doi:10.1007/s10470-024-02323-z
- Guru, P. (2025). "Cellular automata-based framework for yield optimization in VLSI physical design of large-scale benchmark circuits." Journal of Ambient Intelligence and Humanized Computing.
- Guru, P. (2026). "ABO optimized hybrid Trans-CNN-Bi-GRU approach for intrusion detection in IoT networks." Cluster Computing. doi:10.1007/s10586-024-04850-4
He has authored 15+ journal articles, 12+ conference papers, 4 books, and holds 15+ patents in the UK and India.
Awards
- Kalvi Thilagam Award (2024) – Lions Clubs International, for contributions to education.
- Post-Doctoral Research Fellowship – City, University of London (2023–2024).
- Professional Certificates from Harvard University (edX) in Computer Science for AI and Leadership (2023).
Teaching
Courses taught include VLSI Design, Artificial Intelligence, Software Engineering, Computer Organization & Architecture, VLSI Physical Design Algorithms, Advanced Computer Architecture, and Machine Learning for Hardware.